FortifyIQ is seeking a Senior Verification Engineer to play a critical role in validating complex System-on-Chip (SoC) and subsystem designs. This position involves hands-on collaboration with architecture and design teams to ensure high-quality deliverables through comprehensive pre-silicon verification strategies.
Responsibilities:
- Analyze architectural specifications and define detailed verification requirements
- Develop and maintain UVM-based verification environments using SystemVerilog
- Create comprehensive test plans and implement corresponding test cases
- Debug functional issues and perform thorough root-cause analysis
- Collaborate with design and architecture teams to align milestones and quality targets
- Drive coverage closure and ensure verification completeness across projects
Requirements:
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or related field
- 7–10+ years of experience in verification or related engineering roles
- Strong expertise in SystemVerilog and UVM methodologies
- Familiarity with Linux environments and standard EDA tools
- Solid understanding of pre-silicon design and verification flows
- Excellent communication, documentation, and teamwork skills
Benefits:
- Opportunity to work on advanced SoC and subsystem technologies
- Collaborative engineering environment
- Exposure to complex hardware verification challenges
- Flexible remote work arrangement
FortifyIQ offers a technically rigorous environment where experienced engineers contribute to ensuring functional integrity and quality across cutting-edge semiconductor designs.